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Next Generation Fast-SPICE Simulation Technology

Nascentric's OmegaSim™ Fast-SPICE simulator is up to 10x faster than traditional Fast-SPICE solutions. It is accurate enough and fast enough to make SPICE-accurate, transistor-level simulation, of large digital blocks and memories possible.

Patented Technology

To achieve this technological breakthrough, Nascentric has developed and patented an innovative way of rapidly and accurately modeling devices and interconnect in IC designs. Some of the patent awards are shown below and another twelve patent applications are still pending. The following patent awards and those still pending are the cornerstone for OmegaSim:

• Transistor Model - An ultra-fast single current source P- & N-device macro model that delivers SPICE-level accuracy dramatically faster than traditional methods.
  
• Cell Model - An ultra-fast single-input pin switching macro model that also delivers SPICE-level accuracy dramatically faster than traditional methods.
  
• Interconnect Model - A unique fast-form recursive convolution algorithm that reduces time to simulate large, parasitic-rich, transistor-level netlists.
  
• Block Model - A unique method for pre-computing timing graphs that dramatically reduces matrix manipulations and simulation time.
  
• Easily integrated into virtually any design flow, it is the first and only simulator with these patent-pending technologies and an innovative multi-engine architecture that provides the speed, SPICE-level accuracy, capacity, and flexibility needed to address the nanometer design issues involved in predicting actual silicon performance.
  
  

Multi-Engine Architecture

A circuit can be decomposed into basic transistors, logic cells, cell blocks, interconnect structures and multiple other design entities, that each share a unique simulation profile. OmegaSim's multi-engine architecture (as shown in Figure 1) helps in a couple of ways:

• It uses patented, dedicated engines to optimally handle each circuit component.
  
• It provides an efficient infrastructure for managing and parallelizing the simulations.
  
• The use of multiple dedicated engines, optimized for each unique design entity, enables OmegaSim to produce greater accuracy while increasing the speed of simulations.
  

Intelligent Topological Assessments

Recognizing an independent portion of a circuit - especially when there are millions of coupling caps and resistors - can be tricky. Given that this dependence varies with input and resulting control signal changes, partitioning a circuit becomes all the more challenging. OmegaSim's patented algorithms intelligently recognize these partitions/topologies and guide the simulation to use the optimal engine for each partition.

Advanced Interconnect Evaluations

For nanometer designs, parasitic loads are the predominant factor in gate delays (as shown in Figure 2). Nascentric has patented, algorithms that recognize interconnect and model it appropriately without affecting either the accuracy or the effects of that interconnect. This greatly enhances both the simulation time and capacity.

Current-Based Transistor Models

Active MOS devices are intrinsically current-based devices, so a current-based model reflects this behavior significantly better than a voltage-based model. Not only are current-based models as accurate as SPICE or SPICE-like models, but they also reduce the complexity of equivalent circuits. This greatly improves the solution of non-linear equations and matrix solutions. In addition, current-based models are very efficient in device representation, requiring less memory and fewer computational transactions than voltage-based models.

Efficient Memory Management

The memory requirements of full-chip simulations have already crossed the 4 GB limit available on most commercial machines. The increase in the number of transistors in today's nanometer designs and the explosion of parasitic elements only exacerbates this capacity problem. OmegaSim efficiently stores and manages the information needed for key partition simulations, and then collates all the results in the final run, thereby greatly improving memory efficiency.

Seamless Integration and Implementation

OmegaSim is designed to seamlessly integrate with any existing design flow. Designers are offered a choice of either using native BSIM evaluation or their own SPICE simulator to evaluate the foundry models. OmegaSim accepts standard input files (SPICE files, vector files, and so on) and provides output files in industry standard formats (.tr0, .fsdb, .txt). Using a familiar user interface, it can be rapidly deployed in a production flow.

Easily integrated into virtually any design flow, OmegaSim provides the first and only simulator with the patent-pending technology and innovative architecture that provides the speed, SPICE-level accuracy, capacity, and flexibility needed to address the multi-dimensional nanometer design issues involved in predicting actual silicon performance.

Product Backgrounder

For more detailed information regarding Nascentric's patented approach and a copy of our product backgrounder and datasheet, please click here.